1. Field of the Invention
The present invention relates to a memory device and associated main word line and word line driving circuit.
2. Description of the Related Art
Semiconductor memory devices are devices in which data can be stored and from which the stored data can be retrieved. Semiconductor memory devices can be classified into random access memory (RAM) and read only memory (ROM). RAM is a volatile memory that needs power supply to retain data. ROM is a nonvolatile memory that can retain data even when power is removed. Examples of RAM are a dynamic RAM (DRAM) and a static RAM (SRAM). Examples of ROM are a programmable ROM (PROM), an erasable PROM (EPROM), an electrically EPROM (EEPROM), and a flash memory.
A semiconductor memory device comprises a cell array with a plurality of memory cells. Each of the memory cells is connected to a word line and a bit line. The semiconductor memory device includes a word line driving circuit for supplying a word line voltage to a selected word line. FIG. 1 shows a circuit 10 for driving a word line 110 disclosed in U.S. Pat. No. 7,023,738. Referring to FIG. 1, the circuit 10 comprises two level shifters 120s, 120g and a selector 140. The level shifter 120s is used to boost up logic high/low level VDD/VSS of a selection signal SD to bias voltages VPP/VBB, and the level shifter 120g is used to boost up logic high/low level VDD/SS of a selection signal GD to bias voltages VPP/VBB. The level shifters 120s and 120g are implemented by two cascaded stages. The selector 140 is used to apply a control signal GP from the level shifter 120g to the word line 110 according to a supply signal SP from the level shifter 120s. 
An important requirement of current memory device design is low power consumption. This requirement is especially important for use in mobile battery-powered host devices for supporting longer battery-powered operation. For saving power, a memory device enters a standby mode of operation to reduce current consumption. In the standby mode, it is desirable to keep leakage current as low as possible since the ratio of the leakage current to overall operating current increases significantly. Although U.S. Pat. No. 7,023,738 disclosed a driving circuit for a semiconductor memory device, it failed to disclose the power saving mechanism of the driving circuit. Therefore, in order to meet the requirement of the market, it is desirable to provide a driving circuit to reduce leakage current for the semiconductor memory device.